Guidelines to Enhance 3-D Stencil Codes on the Intel Xeon Phi Coprocessor

Accelerators like the Intel Xeon Phi aim to fulfill the computational requirements of modern applications, including stencil computations. Stencils are finite-difference algorithms used in many scientific and engineering applications for solving large-scale and high-dimension partial differential equations. However, programmability on such massively parallel architectures is still a challenge for inexperienced developers. This paper provides firm foundations to guide developers in maximizing the benefits of hardware-software co-design for computing 3-D stencil codes running on the Intel Xeon Phi (Knights Corner) architecture. We propose a set of guidelines to optimize stencil codes based on a C/C++ OpenMP implementation. The guidelines are evaluated using three kernels that are widely applied to simulate heat, acoustic diffusion as well as isotropic seismic wave equations. Our experimental results yield performance gains over 25x when compared to high-level sequential implementations (e.g., Matlab).